DDR Byte-Lane Skew Checker
Compare DQ, DM and DBI delay against each signal’s assigned DQS strobe.
Live results
| Measurement | Result |
|---|
Formula and worked example
Method. Offset = (signal PCB + package delay) − (assigned DQS PCB + package delay). Margin = user limit − |offset|.
Assumptions. Enter one row per signal and an explicit DQS reference for each non-DQS row. A DQS row leaves its reference blank. Missing package delay is zero. Example limits are editable and are not DDR requirements.
Example. DQ0 has 610 + 10 ps and DQS0 has 600 + 8 ps. The +12 ps offset passes a 15 ps limit with 3 ps margin.