Circuit Edge Technologies
Circuit Edge Engineering Lab

PDN Target Impedance & Capacitor Estimate

Translate a load step and droop budget into target impedance and ideal capacitance.

Inputs

Live results

MeasurementResult

Formula and worked example

Method. Target impedance = allowable ripple ÷ load step. Ideal capacitance = load step × hold-up interval ÷ allowable capacitive droop.

Assumptions. Ideal constant-current load step. ESR creates an immediate voltage step. ESL and mounting inductance raise high-frequency impedance. Account for voltage derating and validate across frequency.

Example. A 2 A step with 50 mV ripple gives 25 mΩ. Holding 2 A for 10 µs with 50 mV droop needs 400 µF ideally.

Related calculators