The connector and device escape regions often have more geometric constraints than the open routing area. A board-wide impedance rule does not resolve those boundaries automatically.
What to examine in the layout brief
Review the approved interface requirements, protection-device placement and reference transitions. Keep the pair geometry controlled where possible and document unavoidable neck-downs. Include connector and via behavior in the channel model when performance depends on them.
What belongs in the release record
Release the layout with the interface-specific validation plan. Do not infer a supported operating mode from a nominal impedance value alone.
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Numerical limits and acceptance criteria must come from the actual component documentation, supplier agreement and applicable standards. No proprietary standard tables are reproduced.